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Circuit minimization for Boolean functions
In Boolean algebra, circuit minimization is the problem of obtaining the smallest logic circuit (Boolean formula) that represents a given Boolean function or truth table. The unbounded circuit minimization problem was long-conjectured to be -complete, a result finally proved in 2008,〔 This is an extended version of the conference paper 〕 but there are effective heuristics such as Karnaugh maps and the Quine–McCluskey algorithm that facilitate the process.
==Purpose==
The problem with having a complicated circuit (i.e. one with many elements, such as logical gates) is that each element takes up physical space in its implementation and costs time and money to produce in itself. Circuit minimization may be one form of logic optimization used to reduce the area of complex logic in integrated circuits.
抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』
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